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IC LATCH-UP TEST 集成电路闭锁试验
发布日期: 2008-12-01
本标准已被国防后勤局(DLA)作为项目5962-1880采用。本标准确立了集成电路闭锁测试的定义方法。它定义了设备锁定功能的类别和级别,以便用户和供应商都了解设备的锁定功能。它适用于NMOS、CMOS、双极以及这些技术的所有变体和组合。在决定产品可靠性方面,闩锁是一个极其重要的因素。本文件包含更正后的图4,将T6包含在第12页中,此更改于1998年1月进行。
This standard has been adopted by the Defense Logistics Agency (DLA) as project 5962-1880. This standard establishes a defined method for latch-up testing of ICs. It defines Classes and Levels for a device's latch-up capability so that both the user and supplier understand a device's latch-up capabilities. It is applicable to NMOS, CMOS, Bipolar, and all variations and combinations of these technologies. Latch-up is an extremely important factor in determining product reliability. This document contains the corrected figure 4 to include T6 on page 12, this change was made in January 1998.
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